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  "cid": "bafyreih4lhciqq5td6fcnlkxmqfgk5glfgfldsomossofvu7v3pfgq5u4u",
  "value": {
    "text": "Something else I realized: The upper 16 bits of RISC-V instructions are quite regular (identical for all instructions of a given “type”), so for the 32-bit instructions you could do two jump tables. Jump on low 16 for opcode, jump on high 16 to load regs, return and do operation, next insn.",
    "$type": "app.bsky.feed.post",
    "langs": [
      "en"
    ],
    "reply": {
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        "uri": "at://did:plc:g4kfvq6qttlpqiwfzmz2o73c/app.bsky.feed.post/3lojh33xdys2c"
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        "uri": "at://did:plc:g4kfvq6qttlpqiwfzmz2o73c/app.bsky.feed.post/3lojh33xdys2c"
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    },
    "createdAt": "2025-05-09T17:52:49.551Z"
  }
}